Design And Implementation Of CMOS Phase Shifter For Millimeter Wave Phased Array

The phase shifter is a component that controls the phase change of the signal and plays an important role in the phased array antenna system.Phased array radar can track multiple batches of high-speed maneuvering targets steadily because the phased array antenna has the characteristics of fast beamforming due to the electronic scanning method.In recent years,with the development of the Io T,big data,and AI,the 6G era has quietly set sail.Technologies such as wireless communications phased arrays,and RF transceivers are undergoing another round of technological innovation.As a key module,the phase shifter is also constantly developing in-depth.Therefore,this thesis studies the shifter circuit for MMW phased array based on TSMC 65nm CMOS process.The main work and research results are as follows:1.The implementation principle,structural characteristics,research status,and main achievements at home and abroad of RTPS,STPS,TTD-PS,and VSPS are analyzed in detail.The pros and cons of the RF phase shifting architecture,the LO phase shifting architecture,the IF phase shifting architecture,and digital phase shifting architecture have been analyzed.The technical advantages of the vector synthesis phase shifter under the silicon-based RF phase shifting architecture are clarified.The two key module circuits in the design of vector synthesis millimeter-wave active phase shifter are carefully studied:quadrature signal generator and variable gain amplifier.Their implementation principle,structural characteristics,domestic and foreign research status,and main results are summarized,respectively.Simultaneously,their key theoretical analysis is given.The above research content provides a technical foundation and theoretical preparation for the design and optimization of millimeter-wave active phase shifters.2.A quadrature signal generator circuit with high quadrature accuracy is designed.Specifically,using inductance resonance with the gate-drain parasitic capacitance in the common source amplifier stage to improve the I/Q signal generator's quadrature precision in a wide frequency range.Achieving phase mismatch 0.02°-2.5°and amplitude mismatch 0.7-1.25 d B across the entire Ka-band.In addition,a digital control variable gain amplifier is designed with 3×4 transistor arrays to construct an equivalent Cascode amplifying structure.Specifically,the equivalent cascode transistor is composed of 3×4transistor arrays.The gates of the transistors in the array are respectively connected to VDD or GND by a digital switch,the transconductance of the overall circuit can be changed by turning some of them on or off through programmable digital control signals,and then control its gain.Based on the above two key module circuits,a 6-bit vector synthesis millimeter-wave active phase shifter with stable phase error and amplitude error that works in the entire Ka-band,and has certain competitiveness in power consumption and chip area is designed.The phase shift accuracy is less than 5.625°,and the root mean square phase error is 1.8°-2.8°,the root mean square amplitude error is 0.9-2.1 d B,and the maximum power consumption is 8.9 m W under 1.2 V supply voltage,and the chip area is 0.4 mm².It should be emphasized that this phase shifter can be expanded into a millimeter-wave active phase shifter with higher phase shift accuracy and better performance,which is highly suitable for millimeter-wave phased array systems.3.An ultra-wideband and high gain low-noise amplifier is designed.This LNA adopts a 4-stage amplification structure,of which the first and fourth stages adopt inductive negative feedback complementary common source structure to achieve the purpose of ultra-wideband and high gain.The second and third stages adopt inductive load common source structure to further increase its gain,combined with the low noise and high gain characteristics of TSMC 65nm CMOS process,achieve a noise figure of1.5-1.7 d B and a gain of 22-27 d B in the 27-40 GHz frequency band.At the center frequency of 33.5 GHz and the input power of-40 d Bm,the IP_{1d B} is-29.2 d Bm.Two tones of 33.5 GHz and 33.6 GHz with-40 d Bm input power are utilized,the IIP₃ of the designed LNA is-21.18 d Bm.The proposed ultra-wideband and high gain low-noise amplifier consumes 12.7 m W from a 1.2 V supply voltage and occupies 0.2374 mm².4.An LNA-PS circuit with excellent performance in the entire Ka-band is designed.The LNA-PS circuit is composed of an ultra-wideband high-gain low noise amplifier cascaded with a quadrature signal generator with high quadrature precision,and then cascaded a variable transconductance variable gain amplifier using equidistant contraction technology.The LNA-PS achieves an average noise figure 1.51-2.4 d B,an average gain of 11.8-22.4 d B,an average magnitude of 5.9-11.2 d B,and with an RMS phase error of 1.1°-15.3°,an RMS gain error of 5.7-6.9 d B,an RMS magnitude error2.86-3.48 d B,an RMS noise figure error is lower than 1.56 d B over 27-40 GHz while covering a 360°phase shift range in steps of approximately 2.8125°.The proposed LNA-PS consumes 16.83 m A from a 1.2 V supply voltage,and the chip area is 0.696 mm².