ASIC Design And Prototype Realization Of LFMCW Radar Signal Processing

The operation of LFMCW Radar depends on masses of digital signal operations,they usually requires a lot of external DSP,FPGA resources as processing unit,which undoubtedly increases the cost and complexity of the radar system.Therefore,for the sake of enhance the integration of the system and obtain the LFMCW signal processing system with faster speed,low power consumption and low cost performance,this paper proposes and designs an IF signal processing chip scheme suitable for K-Band millimeter wave radar,and completes the corresponding work from algorithm simulation modeling,hardware structure design,ASIC Design,FPGA platform prototype verification,etc.Our work is as follows:(1)This paper briefly summarizes the basic working principle of the LFMCW radar,and selects the symmetrical triangular wave signal as the frequency sweep modulation signal of the system,reports and deduces the positioning and velocity detection principle and mathematical formula analysis under different static and moving targets.Then,it focuses on the architecture modeling and emulation analysis of LFMCW radar signal processing,including multi period pulse accumulation to increase SNR,MTI filter based on pulse canceller structure,MTD filter based on FFT structure,Two-Imensional constant false alarm rate algorithm based on Maximum-value and Mean-value,multi-target frequency matching algorithm based on fuzzy velocity matrix,etc(2)On the basis of the determined signal processing structure,complete the RTL level HDL code design of the corresponding structure,and set the simulation and reasonable simulation environment to complete the verification of RTL code.Then,the ASIC of radar signal processor is designed based on the digital chip development environment of Synopsys and TSMC90 nm process.The work includes timing constraints,logic synthesis,consistency analysis,low-power design,STA analysis,Floorplan design,Placement design,CTS synthesis,Routing design,Layout design and so on.(3)About the board level prototype verification platform based on FPGA,this design builds a complete set of LFMCW radar system in 24 GHz band,which uses BGT24LTR11 integrated transceiver chip of Infineon company with VCO as transceiver;uses AD9245 as high-speed A/D sampling circuit;uses ADF4159 to generate trigonometric FM wave required by the system;uses Xilinx XC6SLX25 I FPGA chip is the prototype carrier of RTL transplantation.Finally,the test environment is designed to verify the equivalence of the chip prototype.Finally,under the constraint of the clock frequency of 100 MHz,the layout size of the chip is about 1062.4 um * 1059.84 um,the area is about 1125974um^2,and the power consumption is about 4.1074 m W.