Design And Implementation Of Head-Up Display System Based On Cache Memory

With the rapid development of in-vehicle electronic technology,driving safety has become a topic of increasing concern.Drivers' sight shift is a major cause of frequent traffic accidents.Head-up display is a driving safety assisting technology that has been gradually applied to the vehicle field in recent years.It mainly improves the driving safety by reducing the number of times when the driver looks down and obtains the information,so that the sight is concentrated in front.The vehicle head-up display system displays the source planar image on the front windshield surface of the car through image warping and interpolation.To achieve image warping,a mathematical analysis model for vehicle head-up display was established.The geometric mapping relationship between the source image and the target image was determined,and the source pixel access coordinates were obtained according to the calculation.In addition,the bilinear interpolation algorithm was used to calculate the target pixel value.The system resources were saved by multiplying the adders and the multiplexers,and controlling the order of the source pixels to the interpolation module.During the interpolation operation,non-linear access of the source image pixels results in a decrease in memory access efficiency.To solve this problem,Cache was designed to ensure the source pixel access continuity,reduce memory accesses and improve image processing efficiency.To optimize performance of the Cache,a storage separation management technology and an multi-level address comparison technology were proposed to improve the storage density of image pixels and save logic resources.In addition,a method for dynamically adjusting the Cache capacity was proposed to reduce storage resources and power consumption while ensuring the hit rate.The experiment results show that adding Cache can ensure the access efficiency of memory and reduce the image processing time of head-up display system by91.67%.The storage separation management technology used in the Cache module saves storage resources by 25%.The multi-level address comparison technology saves logic resources by nearly 10%.The Cache capacity can be reduced by 75%,the dynamic power consumption is reduced by 67.58% and the static power consumption is reduced by 14.06%.