Hardware Design Of Miniaturized Data Acquisition And Transmission Node Based On Hi Silicon Processor

Data acquisition and transmission system is widely used in underwater resources exploration and marine environmental monitoring.In recent years,the scale and complexity of the system are increasing,and higher requirements have been put forward for transmission bandwidth,synchronization performance and external dimensions of the data acquisition and transmission node.As international competition intensifies,China's chip imports are restricted.Therefore,there is an urgent need to satisfy the system performance and realize the system nationalization design.This thesis developed a miniaturized data acquisition and transmission node based on Hi Silicon processor.The node is designed with Hi Silicon processor and Anlu FPGA as the core devices,controlling the front-end sampling module for data collection and transmission.The Hi Silicon processor is interconnected with Anlu FPGA through the RMII interface,and implements command parsing and processing,and at the same time completing the package of sampled data.FPGA extends dual Gigabit Ethernet interface to complete high-bandwidth data routing and forwarding,and extends multiple highspeed RS-485 interfaces to communicate with front-end sampling modules.In addition,the clock synchronization scheme is improved based on IEEE1588 protocol and FPGA synchronization logic is designed,which realizes high-precision synchronization acquisition of multi-channel data between nodes.This thesis completed the hardware and function test of the node.First,the quality of the power and clock signal of the node was tested.Then verified the Ethernet transmission logic and tested the link bandwidth.Finally,the clock synchronization performance was tested.The test results showed that the performance of the node meet the system requirements.