The Synchronous Data Acquisition System Based On USB Interface Design

A key part of low frequency signal synchronization acquisition system is low frequency phase locked loop.Digital phase-locked loop(DPLL)can achieve high synchronization accuracy,but there is no mature low frequency digital phase locked loop,so this paper researches the design of the low frequency digital phase locked loop and the synchronous data acquisition system.Firstly,the characteristics of common technology and clock signal of the low frequency digital phase locked loop is analyzed,and an implement method of phase locked loop based on FPGA is proposed,which is suitable for low frequency clock signal.1ms low frequency clock signal is extracted and realized from the SOF signal of USB,which is used as a reference signal of phase locked loop to lock the oven controlled crystal oscillator(OCXO).It has the advantages of high accuracy and simple structure,etc.And then,a synchronous data acquisition system is designed,which used the designed digital phase locked loop.The system's clock circuit,FPGA application circuit,CPU interface circuit and power circuit and other hardware module circuit are designed in detail.The system software based on USB communication interface is designed,which is included USB firmware,USB driver and application software.Finally the performance test of the designed low frequency signal digital phase locked loop and synchronous data acquisition system is given.Test results show that the designed all digital phase locked loop is able to locate and track the low frequency signal,the designed synchronous data acquisition system implements multi-sets of synchronization acquisition,and it can be applied to actual system.