Design And Implementation Of Digital Intermediate Frequency Board Based On FPGA

Software radio is widely used in commercial and military communication infrastructure,and digital intermediate frequency technology is one of the key technologies of software radio.Most of the functions of software radio are implemented by programmable signal processing devices,which enables the radio system to change its operating parameters to adapt to new features and functions.Digital IF technology is a key technology in software radio technology.It is a bridge connecting the radio frequency front end and the digital signal processing back end.FPGA has the characteristics of high performance of application-specific integrated circuits and the flexibility of general-purpose DSP devices.FPGAs have been widely used in various communication systems,and the signal processing in digital intermediate frequency technology has also become increasingly popular.In this paper,the digital IF technology is researched,the key technologies in this field are studied in detail,and the hardware and logic design of the digital IF board is completed based on FPGA.First of all,this article introduces the research background of digital intermediate frequency technology,introduces the application of digital intermediate frequency in radar system,and introduces the research status at home and abroad at the same time.Analyzed the principles used in the digital intermediate frequency process,explained the principles of digital up-conversion and digital down-conversion,introduced CIC decimation filtering,CIC interpolation filtering,FIR decimation filtering,FIR decimation filtering methods,introduced the sampling theorem and digital-analog/ The principle of analog-to-digital conversion.Secondly,the overall system hardware design of the digital intermediate frequency board has been completed,and the design of each sub-module: power supply module,clock module,digital-to-analog conversion module,analog-to-digital conversion module and FPGA peripheral circuit.Then,the logic design of the system was completed: digital down-conversion,digital up-conversion,FIR extraction/interpolation filtering,high-speed communication interfaces srio,aurora,and clock configuration interface SPI design.Simultaneously,the function of the filter was simulated and verified,and the simulation structure It is basically consistent with the design purpose.Finally,the hardware status detection of the digital intermediate frequency board is completed,and the system logic function is verified.The captured signal shows that the output of the digital down-conversion meets the expected goal,the signal output from the DAC is consistent with the calculation result,and the high-speed communication interface can transmit data correctly.The final result shows that the design meets the expected goal.