Font Size: a A A

Design And Implementation Of Multi-channel Isolated Acquisition,editing And Transmission Device Based On FPGA

Posted on:2022-11-28Degree:MasterType:Thesis
Country:ChinaCandidate:R N DuFull Text:PDF
GTID:2492306761990419Subject:Wireless Electronics
Abstract/Summary:PDF Full Text Request
In the large-scale aerospace engineering test,the dynamic parameters of the aircraft to be tested need to be monitored,processed and analyzed in real time.This topic comes from the development task of "acquisition and coding device of a telemetry system".A multi-channel isolated acquisition and coding device and long-line data transmission device based on FPGA are designed.It can collect multi-channel analog signals with different ranges in common and isolation,package and frame them together with the digital signals received from other equipment on the aircraft,transmit them to the memory through LVDS long line,and realize command and data interaction with the ground measurement and control console through Gigabit Ethernet,so as to complete the online update of the program of acquisition and editing device,memory and positioning device.According to the development task,analyze the functional requirements and design the scheme of the acquisition and editing device.Firstly,each board is designed according to the divided functions.Secondly,422 isolation circuit and FPGA power supply circuit are introduced,with emphasis on LVDS circuit and adding driver and equalizer to ensure long-distance zero bit error rate transmission;FPGA + PHY method is adopted to realize the design of transceiver control through rgmii interface;The isolation acquisition accuracy is improved by isolating the signal to be collected by linear optocoupler,analog switch and a / D converter,isolating the power supply by DC / DC converter,and isolating the bus control signal by digital isolator.The software part designs the control logic according to the functions of each board,and focuses on five key points: online program loading,ROM address lookup table control switching channel,ADC acquisition timing,8B / 10 B coding of LVDS link,UDP protocol and CRC check retransmission mechanism.Finally,build a closed-loop test environment to test the overall function,Ethernet instructions,LVDS transmission bit error rate and hybrid acquisition accuracy to verify the reliability of the whole device.Through unit test,equipment joint test and a large number of environmental tests,the acquisition and coding device can complete the acquisition accuracy better than 1 ‰ common ground and isolation acquisition,receive 7-way asynchronous and 2-way synchronous digital quantity,send the acquisition and coding status to the telemetry combination and data synthesizer,realize the transmission of transmission and reception zero error code through2-way LVDS,and complete the transmission of zero error code at the speed of 480 Mbit / s on120 m cable.Ethernet can receive and forward various ground commands,complete real-time monitoring of acquisition and editing status,and realize error free transmission of 30M/ bps.
Keywords/Search Tags:FPGA, Isolated acquisition, Ethernet, LVDS, Request / Retransmission
PDF Full Text Request
Related items