| With the continuous development of aerospace technology,aerospace integrated circuits are gradually moving towards nano-technology.However,the reduction in process size has led to the emergence of new radiation effect mechanisms.The charge sharing effect is significant,which makes the analysis and evaluation of the radiation effect of nano-process integrated circuits difficult.Studying the simulation method of single event effect is of great significance to promote the optimization of aerospace integrated circuit design,improve the experimental method of single event effect and improve the adequacy of evaluation of aerospace integrated circuit.In this paper,the 28 nm circuit-level single-event effect simulation technology research is carried out.The main research and results are as follows:(1)Based on Sentaurus TCAD software,a three-dimensional simulation model of 28 nm device was established,and the parameters were calibrated with TSMC bulk silicon CMOS process.Through simulation,the basic transient characteristics of the device were first obtained,the effects of device size and particle radius on charge collection were analyzed,and then the effects of different factors on the charge sharing effect were studied for two MOS devices arranged nearby.Including:particle LET value,shallow trench isolation depth,device distribution distance and particle incident direction and angle,etc.,elaborated the difference between the transient pulses of the active and passive devices and the reasons.The main conclusions obtained by the simulation are:The charge collection and peak current of both active and passive devices increase linearly with the LET value of the incident particles;changing the STI depth and device spacing will have a greater impact on the charge collection of the passive device than the active device;the effect of the incident direction and angle of the particles on charge sharing very large,when the particles are incident at a large angle,the transient pulse of the passive device may be significantly higher than that of the active device.(2)Establish a transient pulse model with the effect of charge sharing,which can be applied to the simulation of single event effects in circuits.Considering the influence of complex factors on the charge sharing effect,a transient pulse model based on the lookup table and double exponential function is proposed.The model is determined by the particle LET value,the incident angle and the device spacing,and is interpolated by the multidimensional function of the lookup table data.,Generate transient current pulses of the active and passive devices under any conditions.Based on Verilog-A language,the model is implemented as a fault injection source that can be used for circuit-level simulation.At the circuit level,the pulse quenching effect in the inverter chain and the upset and recovery of the 6T SRAM cell is simulated,which verified that the injection model can be used to simulate the charge sharing.(3)Carry out circuit-level single event effect simulation methods for large-scale digital circuits.Based on the propagation of transient pulses in the circuit,a circuit-level simulation scheme combining single event equivalent pulse injection and SPICE-based analog circuit simulation is constructed.The simulation process is divided into four stages:netlist analysis and conversion,establishment of fault source and fault injection,SPICE simulation,error analysis and statistic.The fault injection based on layout and the analysis of multi-bit upset and multi-transient related to charge sharing are solved.(4)The single event effect simulation of large scaled circuits is carried out using the PIC processor as a case.The single event sensitivity of the register,critical path fault injection,and overall random injection analysis were simulated separately.The simulation results obtained are:the single event sensitivity of the PC register and the W register of the PIC processor is the strongest;the transient pulse in the clock tree has a bad influence on the circuit,it is necessary to protect the clock tree;it found that the number of transient errors exceeds the upset errors under the current node.The conclusion indicates the feasibility of the circuit-level simulation method constructed in this paper. |