VLSI Thermal Sensing and Management using Low Power Self-calibrated Delay-line Based Temperature Sensors

The power density of microprocessor chips continues to rise due to the growing demand on microprocessor performance and technology scaling. The resulting temperature rise and thermal gradient not only increase cooling cost, leakage current/power consumption and failure rate, but also affect device speed. These thermal induced problems could be alleviated by employing dynamic thermal management (DTM) that reduces thermal emergencies while avoiding performance degradation. To enable an effective DTM, accurate monitoring of the on-chip temperatures at a large number of strategic locations becomes necessary. This thesis proposes a fully-digital self-calibration method that could remove the delay-line based temperature sensors' sensitivities to process and supply voltage variations. The proposed calibration method assigns a unique correction factor, NC to each sensor, making all the sensors have the same calibrated outputs at start-up. Only one calibration block is required to calibrate multiple delay-line based temperature sensors sequentially. For each additional sensor, only additional registers for storing NC are required. The proposed temperature sensors are demonstrated on an Altera Cyclone IV FPGA based VLSI thermal management system. Four microprocessor cores are mapped onto a Cyclone IV FPGA chip to emulate the VLSI load. Each core has a temperature sensor close by. The runtime thermal profiles for the four microprocessor cores with eight different Dynamic Thermal Management (DTM) methods are obtained. Experimental results from different DTM techniques are studied. In comparison to a conventional global DFS approach, a proposed hybrid DTM reduces the amount of time that the MPSoC spends at higher temperatures and larger thermal gradients, by 10 % and 21 %, respectively. In addition, the proposed hybrid DTM offers a 10 % improvement in the average processing rate (instructions per second) when compared with the conventional global DFS approach.