| As digital integrated systems continue to grow in complexity and operating speed, the time-domain analysis of VLSI system interconnects becomes more important than ever before. The area of interconnect analysis has the following two concerns: (1) modeling non-ideal interconnects accurately and separately from their ambient circuitry, and (2) incorporating these models efficiently into general-purpose circuit and timing simulators. Up to now, most digital-design analyses consider interconnects as blocks independent of their nonlinear driver/terminations, due to either the inefficiency in direct time-domain simulation, or the difficulty in integrating accurate interconnect models into general-purpose circuit and timing simulators.;This thesis presents a methodology for efficient modeling and simulation of VLSI interconnection networks. The first part of this thesis describes the modeling method for various classes of interconnects. The second half details the development process of time-domain macromodels based on these simulation models and discusses their applications in VLSI system design. This methodology proposes a unified circuit simulation framework for inhomogeneous interconnect analysis which is suitable for incorporation in general-purpose circuit simulators.;For large lumped circuits which frequently appear in VLSI design, the Asymptotic Waveform Evaluation (AWE) technique is applied to generate a reduced-order time-domain macromodel. In addition, the stability issues related to this method are addressed. For lossy transmission lines, iterative lumped circuit (ILC) models are developed and shown to be simple, yet reasonably accurate models. The extracted equivalent circuits of interconnects, with frequency dependence and coupling effect being incorporated, are shown to be handled efficiently with these ILC models. When the lines are low-loss or lossless, ILC models may be inefficient as compared to using the Method of Characteristics (MC) directly. Therefore, the time-domain macromodels are generalized to include any form of the above techniques, and a metric to determine which technique to use in generating a macromodel is introduced. The simplicity and generality of these macromodels is demonstrated through examples employing different classes of interconnects. |
