Interconnect Lines In Large-scale Integrated Circuits Time-domain Transient Response Analysis

With the development of very high speed large scale integrated circuit (VLSI), the size of intelligent chip is decreasing while the speed of signal is increasing, thus the influence of transmission line on the performance of circuit is more obvious, such as delay and cross talk etc. These degree of high-speed effects if not predicted accurately at early design stages, can severely degrade system performance, even the function of the circuit can't complete correctly. Therefore, there have been so many work done about the transient response analysis of transmission line. Presently, the research can separate into frequency-domain method and time-domain method. In this paper, based on the existent research, started from time-domain method, differential quadrature (DQ) method is studied principally. Combined the DQ method with the time-domain modified node approach (MNA), a generalized modal is established. This modal can be used to analyze large scale circuit including transmission lines. It is efficient and applied to extensive cases. In addition, several RC tree modals about delay of transmission line are compared and analyzed. A new method using Euler formula is brought forward to solve the RC tree, which leads to higher efficiency with the same accuracy.