Optically controlled analogue to digital converters

This thesis is concerned with the design of analogue to digital converters (ADCs) with high sample rates (in excess of 2Gsample/s) and moderate to high resolution (at least 8-bits). This goal is beyond the capability of current electronic technology, due principally to problems caused by clock timing jitter. To overcome this problem, optoelectronic techniques are examined, which can utilise the inherent low jitter available from modern laser sources and optical clock distribution schemes. A novel optoelectronic technique is proposed which uses an interleaved ADC architecture and optical clock distribution to obtain the required performance. A key component in this system is an optically triggered sample and hold circuit (OS/H). A range of fully integrated OS/Hs have been fabricated using a standard GaAs MESFET technology. These circuits combine both electronic and optical components on a common substrate and demonstrate the use of a standard electronic technology for optoelectronic applications. Measurements on these circuits have demonstrated their effectiveness for this application. A discussion of the effects of timing errors (both static and dynamic) in interleaved sampling systems leads to the description of a technique for correcting the effects of clock skew. The implementation of this is very straightforward, involving only the adjustment of DC bias voltages. The system has been designed so that it can employ current optoelectronic integration technology, and in particular the clock distribution and delay can be realised using integrated optical waveguides.