Fiber lasers and all optical logic gates for header processing in high-bit-rate optical networks

As information technologies push network capacities toward higher bit rates, fiber-optic communication networks will eventually be capable of transmitting data at a rate at which electronic switches cannot respond. A solution to this problem is to replace the electronics at the front and back ends of the transmission system where data enters and exists in optical format with all-optical header processors. In this thesis, I will describe how the header processor has been divided into all-optical switching modules, which will act as the basic building block for the header processing unit. Each module arises from the integration of an erbium-doped fiber laser and an all-optical logic gate.; The erbium-doped fiber laser (EDFL) acts as a local power supply for the module. It restores the pulse shape, pulse amplitude, and timing of an incoming optical bit stream. The development of a short-pulse EDFL and a high-power EDFL for this application is described. The high-power EDFL employs a unique cavity design that eliminates multiple pulses when pumped with high powers.; Data processing is performed within the module by all-optical logic gates, which switch due to the nonlinear interaction of one pulse of light with another in optical fiber. Therefore, these gates can work at the bit rate of the transmission system and avoid the bottlenecks inherent in electronic processors. The design and demonstration of a low-latency soliton-dragging gate and a low-birefringent nonlinear optical loop mirror (low-bi NOLM) logic gate are described. The two logic gates are optimized for energy contrast, switching energy, timing sensitivity, and cascadability. Logic functionality is also demonstrated.; The thesis culminates in an experiment that integrates the laser and logic gate work by driving two cascaded low-bi NOLM's with an EDFL. It is shown that this experiment utilizes all the components necessary to read the header of a high-bit-rate data packet, bringing closure to the switching module project.