| The importance of manufacturing high quality digital circuits cannot be overemphasized. The most practical way to assure quality is to test the fabricated circuits against the specifications and to diagnose the cause and location of failure. Diagnosing and locating faults in Very Large Scale Integration (VLSI) circuit can be done either manually or automatically. Probing and deduction, which require manual examination of the chip, are not suitable and practical for large circuits. Therefore, a tool that automates the diagnosis process for VLSI circuits is needed. Such tools should be technology independent, minimize manual debugging intervention and be faster than current technologies. Automated diagnosis tools exploit (1) cause-effect analysis or (2) effect-cause analysis.; In cause-effect analysis, the logical behaviors of primary outputs in the presence of faults are computed using fault simulation and stored in a table referred to as fault dictionary. Faults are located by comparing the stored behavior to the response of the circuit under diagnosis. The costs associated with that method are (1) test generation, (2) one or more full fault simulation(s), (3) compressing, (4) substantial amount of storage space and (5) the overhead for searching.; In effect-cause analysis, faults are located by observing the faulty behavior of the circuit under diagnosis and by deducing the location of the defect from the observed faulty and fault-free behavior of the circuit. This process involves implications of logic values in both forward and backward, and vertically across vectors.; In this thesis, a new approach is introduced to locate and diagnose faults in combinational and synchronous sequential VLSI circuits. The approach is based on automatically designing a circuit which implements a dynamic diagnosis algorithm specialized for the circuit under diagnosis. The designed circuit is mapped onto a reconfigurable hardware allowing test vector generation, fault simulation and the matching algorithm to run at hardware speed. This approach allows dynamic diagnosis to be performed for large circuits and eliminates the need for large storage and reduces the CPU time required by a software-based diagnosis and preserve diagnostic resolution of a full dictionary. |
