Design and fabrication of fast programming flash EEPROM cells

The objective of this thesis is to design, fabricate and characterize novel flash EEPROM cells. The flash EEPROM cell under consideration is similar to the conventional cell structure but has additional p{dollar}sp+{dollar} regions adjoining the n{dollar}sp+{dollar} source and drain of the cell. The flash EEPROM cell relies on the breakdown of Zener junctions placed underneath the gate oxide at the source and drain regions to generate hot electrons for programming. High critical electric fields in the space charge regions of the p{dollar}sp+{dollar}-n{dollar}sp+{dollar} junctions at breakdown result in programming speeds that are an order of magnitude faster than those of conventional flash cells.; Design considerations related to the process flow, process and device simulations are presented. The flash EEPROM process is designed to be compatible with existing CMOS/BiCMOS processes. The flash EEPROM cells were implemented in the fabrication facility at the University of Toronto. Issues related to process characterization are discussed. The results of the electrical characteristics measurements of the flash EEPROM cells are presented. Specific results include a 6{dollar}mu{dollar}s programming time obtained experimentally for devices with 3{dollar}mu{dollar}m gate length. This is comparable with the programming time for previously reported submicron devices. This programming time is in a good agreement with simulation. Furthermore, the simulation results demonstrate that programming times in the range of hundreds of nanoseconds at reduced supply voltage are possible with appropriate p{dollar}sp+{dollar} pocket doping profiles. The erase time was measured to be about 100ms and is consistent with the erase time for conventional flash cells employing Fowler-Nordheim tunneling. The read current was about 100{dollar}mu{dollar}A per {dollar}mu{dollar}m channel width in the eased state with 3V and 5V applied at the drain and control gate, respectively.; The flash EEPROM cells presented in this thesis are suitable for embedded memory applications in the field of telecommunications where programming speed is essential.