| This work constitutes a study of programming mechanisms for silicon-based nonvolatile memory devices and especially secondary electron programming. Flash memory devices, the most prevalent form of nonvolatile memories currently processed with silicon technology, were studied by both experimental characterization and computer simulation. Programming the standard flash memory cell requires energetic electrons, and in this work, an unconventional technique to create energetic carriers known as substrate current-initiated hot electrons (SCHE) or channel electron initiated secondary electrons (CHISEL) has been explored for low-power programming. Flash devices were characterized and simulated to examine how secondary electron injection behaved in scaled devices and how it might be controlled by the choice of structural parameters and material types. Conventional programming was examined with a multi-level approach that explored the possibility of quadrupling storage density. Automated testing equipment and a program-and-verify algorithm were used to precisely program a sample of cells to sixteen different levels that were again distinguished after a ten-year-equivalent data retention test. Secondary electron programming was characterized as a means of over-erase correction. The application of a substrate bias in 0.85 mum channel-length devices was found to make the block operation more reliable, efficient, and 100 times faster. The physical mechanism that generated secondary electrons was then examined by developing a multiple stage simulation method that coupled electron and hole Monte Carlo simulations to calculate the gate current. The peak of secondary electrons that are injected into the gate was found to be located away from the peak of secondary impact ionization. The efficiency of programming was investigated for devices with channel lengths down to 120 nm, and seen to rise six times when the local substrate doping level was doubled. The simulation method was extended by adding Monte Carlo scattering models for graded-layer SiGe devices, and secondary electron gate current was seen to rise over four times when SiGe layers were included in both planar and vertical 180 nm channel length devices. |
