| Device technology, driven by the quest for cost reduction, is advancing towards the production of sub-100nm devices. Research in new device structures is among the many critical engineering activities for technology development in the post-shrink era. In the course of the device miniaturization, researchers should not only address issues of significance to device performance but also take into account the device's compatibility with current common-practice design rules.;This thesis aims at the development of Schottky-tunneling transistors for integrated circuit applications in the post-shrink era, and addresses a few of the most important parameters pertaining to transistor performance. With mathematical models and simulation results, the author demonstrates that high transconductance and saturated I-V characteristics of the device are achievable. |
