| Distributed shared memory multiprocessors share a globally addressable memory space over a set of distributed memory modules. In such a system, the processors and memory modules communicate with each other by sending request and response messages through an interconnection network. Thus, the design of the interconnection network has significant impact on the performance of the multiprocessor system. In the past, most ring-based multiprocessor systems proposed and built have been based on unidirectional rings. In a unidirectional ring, a message must traverse the entire ring to reach the immediate “upstream” neighbor. In this thesis, we investigate various aspects of the bi-directional ring (B-ring) as an interconnection network for multiprocessors. A B-ring consists of two rings carrying messages in opposite directions. It allows a request message to traverse one ring from the source to the destination, and allows the response message to use the other ring to return to the source. Hence, the request-response transaction does not require traversal of the entire ring as in the case for the unidirectional ring. The B-ring network thus exploits communication locality to enhance performance. The existence of two rings can also improve the reliability of the system.; In this thesis, an analytical model for the B-ring network is derived, and its accuracy is verified through simulation. Based on the same methodology, the math model for a two-level hierarchical ring (H2) network built from unidirectional rings is also derived. The performance of the B-ring network is compared with that of the H2 network through the math models. The effect of varying the workload parameters such as cache miss rate and communication locality, and the system parameters such as cache line size and memory access speed are studied in detail. It is shown that the B-ring network outperforms the H2 network in most of the cases, even if the optimal configuration of the H2 network is used. |
