| There exist a variety of quality assurance techniques for tasks ranging from post-silicon validation, silicon debugging, manufacturing testing, in-field testing, and life time resiliency. Adding dedicated circuitry (so called "DfX") to exclusively support each task would be too costly, as each technique incurs non-trivial overheads. In this thesis, we show that cost-effective quality assurance techniques can be developed by sharing resource among different DfX and by going mostly digital for mixed-signal/RF DfX. These techniques are demonstrated using case studies on digitally-assisted analog circuits and three-dimensional (3-D) integrated designs.;In the first part of the thesis, we propose the reuse of the calibration circuitry, which is often incorporated in modern mixed-signal/RF circuits as a design-for-yield feature, as a design-for-test feature for reducing production test time.;Then, we present an all-digital built-in self-test (BIST) technique to characterize the transfer function of RF PLLs. This method could be useful for validation, pro-duction testing, and online tuning.;Finally, we describe an error tolerance scheme for 3-D CMOS imagers that can be used to tolerate manufacturing and online defects so as to enhance the yield and reliability of the imager. |
