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Monte Carlo studies of hot-carrier degradation and device performance in low-power, deep submicron n-MOSFETs

Posted on:2000-04-21Degree:Ph.DType:Thesis
University:North Carolina State UniversityCandidate:Williams, Stewart ClarkFull Text:PDF
GTID:2460390014964173Subject:Engineering
Abstract/Summary:
In this thesis, hot-electron induced device degradation and device performance in silicon n-MOSFET's is studied theoretically. To accomplish this goal, we employ an ensemble Monte Carlo simulator that is adapted to model hot-carrier transport under low-voltage bias. The Monte Carlo model uses a realistic silicon band structure for the two lowest conduction bands, and contains all relevant aspects of 3-D electron transport including interactions with other 3-D electrons, acoustic and intervalley phonons, and ionized impurities along with impact ionization and interface scattering. Further, this Monte Carlo simulator is modified to model gate polysilicon depletion and channel carrier quantization.; The study is first applied to investigate scaling and device performance trends in channel engineered n-MOSFET's. The ensemble Monte Carlo device simulator is used to extract hot-carrier reliability and device performance for super-steep-retrograde and more conventional silicon n-MOS designs with effective channel lengths scaled from 800–100 nm. In the next part of the thesis, we employ a comprehensive Monte Carlo-based simulation method to compare the hot-electron induced device degradation and transistor performance for two competing doublegate SOI designs (one with a lightly-doped channel and one with a heavily-doped channel) and a comparable single-gate design. All three SOI devices have an effective channel length of 80 nm. The results of these investigations reveal that the location and strength of peak hot-electron injection is a strong function of internal device configurations. Together, measures of performance and hot-carrier degradation indicate that otherwise well-designed n-MOSFET's need careful evaluation as candidates for future device technologies.; Next, this work validates the new features of the Monte Carlo simulator including quantized channel carriers and polysilicon depletion through capacitance modeling. Overall, calculated and measured values of capacitance show good agreement, indicating that the quantization models coupled to a Poisson solution that accounts for polysilicon depletion performs reasonably well. To demonstrate the predictive capability of the channel quantization and polysilicon depletion models, the Monte Carlo simulator is used to evaluate a bulk n-channel MOSFET with an effective channel length of 25 nm. The predicted drain current from our Monte Carlo simulator compares well against drain current estimations from established simulation tools. Further, the Monte Carlo tool is used to examine occupation of the subbands by 2-D electrons in the 25 nm device. The mechanisms affecting subband occupation in highly nonuniform channel configurations have not been previously well documented. Simulation results suggest that the subband populations are highly influenced by 2-D carrier scattering near the source end of the channel and by quasi-ballistic transport near the drain side of the channel.
Keywords/Search Tags:Device, Monte carlo, Degradation, Channel, Hot-carrier, Polysilicon depletion
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