Modeling and applications of current dynamics in a complex processor core

Measuring and modeling instantaneous current consumption or current dynamics of a processor is important in embedded system designs, wireless communications, low energy mobile computing, security of communications, and reliability. This thesis introduced a new instruction-level based macro-modeling approach for instantaneous current consumption in a complex processor core along with new instantaneous current measurement techniques at the instruction and program level. Current consumption and voltage supply waveforms of a processor core were acquired by a sampling oscilloscope through an external interrupt-based setup. Accurate measurements of current, power and energy consumption at the instruction, block, or program level were obtained from analyzing the stored current and voltage waveforms. The simulated instantaneous current waveform at the program level was generated in two steps. First, a base waveform of the current simulation was generated by the use of four basic current superposition principles applied to current approximating functions at the instruction level. Secondly, a final waveform of the simulated current was generated from the base waveform by applying a factorial adjustment as a function of the instruction parallelism and sequencing. Step-by-step current modeling procedures with numerical examples were presented. The model captured 98% of the variation of the instantaneous current for 6 complex diverse applications, with an average RMS error of less than 2.7% of the average measured mean. Energy estimates obtained by the use of the simulated current waveforms were within 1.9% of the measured values. The current measurement and modeling techniques were applied to analyze the security of applications resistant to power analysis attacks. First, a current smoothening technique was developed in order to reduce the current peaks and the overall current variation generated by an application. Second, an energy analysis technique that used energy distribution comparisons was developed to analyze the security of an implementation against simple power analysis attacks. Third, a power analysis attack resistant architecture capable of dynamically controlling the current variation limits of an application was proposed. This research is important, since for the first time power modeling has been extended to security and for the first time highly accurate instruction-based models of instantaneous current and power for complex processor cores have been developed.