| Intersymbol interference (ISI) is an impediment that arises in bandlimited transmission systems of which magnetic recording (MR) is one example. Turbo equalization is a recently developed novel technique for combatting ISI and is believed to be capacity-approaching. It is based on iterative processing of soft information between the channel detector that works on ISI and the outer decoder that processes the coded information. A major obstacle in realization of turbo equalization of ISI channels is the complexity associated with the soft-in soft-out (SISO) channel detector especially when ISI extends over many symbol periods. To avoid this difficulty, this thesis presents a reduced-trellis ISI detection scheme based on constrained-delay a posteriori probability (CD-APP) estimation and decision feedback (DF). Fixed-delay approaches typically rely on hard DF (HDF) resulting in the error propagation effect which causes the generated soft decisions to become distinctly non-Gaussian. This in turn prevents the quality of soft information from improving in the iterative process. We discuss an efficient soft DF (SDF) scheme to alleviate this effect. Relying on the extrinsic information transfer (EXIT) chart as an analysis tool, we identify the parameters of the feedback-based CD-APP scheme, i.e., the value of decision delay and the feedback type, that offer the most favorable complexity/performance trade-off.; In the context of turbo equalization, SISO linear minimum mean square error (LMMSE) equalization is another candidate for low-complexity ISI detection. For large constellation sizes, this may be considered as an attractive alternative. However, in applications where ISI is severe and/or input is binary, we demonstrate that CD-APP with HDF/SDF is superior in terms of both complexity and performance. One such application is high density MR for which we observe that a very small decision delay is sufficient to secure most of the iterative gain in bit as well as sector error rate. Being a forward-only algorithm, CD-APP with SDF/HDF relaxes the requirement on storing the intermediate state/branch metrics altogether. We benefit from this property to come up with area-efficient VLSI architectures with clear advantages over the existing algorithms in the literature. |
