Intra-Chip Free-Space Optical Interconnect: System, Device, Integration and Prototyping

Currently, on-chip optical interconnect schemes already proposed utilize circuit switching using wavelength division multiplexing (WDM) or all-optical packet switching, all based on planar optical waveguides and related photonic devices such as microrings. These proposed approaches pose significant challenges in latency, energy efficiency, integration, and scalability.;This thesis presents a new alternative approach by utilizing free-space optics. This 3-D integrated intra-chip free-space optical interconnect (FSOI) leverages mature photonic devices such as integrated lasers, photodiodes, microlenses and mirrors. It takes full advantages of the latest developments in 3-D integration technologies. This interconnect system provides point-to-point free-space optical links between any two communication nodes to construct an all-to-all intra-chip communication network with little or no arbitration. Therefore, it has significant networking advantages over conventional electrical and waveguide-based optical interconnects.;An FSOI system is evaluated based on the real device parameters, predictive technology models and International Roadmap of Semiconductor's predictions. A single FSOI link achieves 10-Gbps data rate with 0.5-pJ/bit energy efficiency and less than 10--12 bit-error-rate (BER). A system using this individual link can provide scalability up to 36 nodes, providing 10-Tbps aggregate bandwidth. A comparison analysis performed between a WDM-based waveguide interconnect system and the proposed FSOI system shows that FSOI achieves better energy efficiency than the WDM one as the technology scales. Similarly, network simulation on a 16-core microprocessor using the proposed FSOI system instead of mesh networks has been shown to speed up the system by 12% and reduce the energy consumption by 33%.;As a part of the development of a 3-D integrated FSOI system, operating at 850 nm with a 10-Gbps data rate per optical link, the photonics devices and optical components are individually designed and fabricated. The photodiodes (PDs) are designed to have large area for efficient light coupling and low capacitance to achieve large bandwidth, while achieving reasonably high responsivity. A metal-semiconductor-metal (MSM) structure is chosen over p-i-n ones to reduce parasitic capacitance per area, to allow less stringent microlens-to-PD alignment for efficient light coupling with a large bandwidth. A novel MSM germanium PD is implemented using an amorphous silicon (a-Si) layer on top of the undoped germanium substrate, serving as a barrier enhancement layer, mitigating the low Schottky barrier height for holes due to fermi level pinning and a surface passivation layer, preventing charge accumulation and image force lowering of the barrier. Therefore, the dark current is reduced and low-frequency gain is eliminated. The PDs achieve a 13-GHz bandwidth with a 0.315-A/W responsivity and a 1.7-nAmum² dark current density. The microlenses are fabricated on a fused silica substrate based on the photoresist melt-and-reflow technique, followed by dry etching into fused silica substrate. The measured focal length of a 220-mum aperture size microlens is 350-mum away from the backside of the substrate. The vertical-cavity surface-emitting lasers (VCSELs) are fabricated on a commercial molecular beam epitaxially (MBE) grown GaAs wafer. The fabricated 8-mum aperture size VCSEL can achieve 0.65-mW optical power at a 1.5-mA forward bias current with a threshold current of 0.48 mA and a 0.67-A/W slope efficiency.;Three prototypes are implemented via integrating the individually fabricated components using non-conductive epoxy and wirebonding. The first prototype, built on a printed circuit board (PCB) using commercial VCSEL arrays, achieves a 5-dB transmission loss and less than -30-dB crosstalk at 1-cm distance with a small-signal bandwidth of 10 GHz, limited by the VCSEL. The second board-level prototype uses all fabricated components integrated on a PCB. The prototype achieves a 9-dB transmission loss at 3-cm distance and a 4.4-GHz bandwidth. The chip-level prototype is built on a germanium carrier with integrated MSM Ge PDs, microlenses on fused silica and VCSEL chip on GaAs substrates. The prototype achieves 4-dB transmission loss at 1 cm and 3.3-GHz bandwidth, limited by commercial VCSEL bandwidth. (Abstract shortened by UMI.)...