| Over the past few decades, great efforts have been made to miniaturize electronic devices. One approach for interconnecting electronic devices that has gained much attention is the use of three-dimensions (3D) compared to the conventional 2D approach. One such example of 3D interconnect technology is Through Silicon Vias (TSVs) process. TSVs process will provide interconnect that are shorter and dense, thus, will increase the speed of electronic devices and miniaturize electronic devices.;The fabrication of TSVs can be divided into six areas: blind via formation, insulation, barrier, and seed deposition, copper electroplating, wafer attachment, wafer thinning, wafer backside processing and electrical characterization. The main focus of this thesis is on three main areas: using tantalum nitride thin film as diffusion barrier, wafer backside processing, and electrical characterization of TSVs fabricated at HiDEC facility of University of Arkansas. |
