Amplifier design for differential temperature sensors in built-in testing applications | Posted on:2014-08-12 | Degree:M.S | Type:Thesis | University:Northeastern University | Candidate:Feng, Junpeng | Full Text:PDF | GTID:2458390005484457 | Subject:Engineering | Abstract/Summary: | | Low-cost radio frequency (RF) communication circuits are frequently fabricated in complementary metal-oxide-semiconductor (CMOS) technology. As system-on-chip and system-in-package designs are becoming increasingly complicated, the manufacturing test cost is continuing to make up a larger portion of the total product cost while the need for built-in testing and calibration methods rises to ensure reliable operation during the lifetimes of chips. Accordingly, on-chip performance monitoring of individual analog blocks within RF chips is beneficial for identification of faulty devices and system-level self-calibration. A non-intrusive built-in testing method for on-chip performance monitoring of analog/RF integrated circuits is advanced in this research. A sensor circuit was designed to monitor signal power dissipation and linearity characteristics based on electro-thermal coupling instead of an electrical connection in order to avoid impact on the performance of the device under test (DUT). With this approach, a bipolar junction transistor is placed in the vicinity of the DUT as thermal detector. The sensor circuit transmits a detected temperature change that reflects the power dissipation in the DUT. Two amplifiers are used in the sensor core to process the currents from the temperature-sensing transistors. In this thesis, a class AB output stage was developed for these amplifiers, which allowed to extend the dynamic range and enhance the sensitivity of the sensor circuit. Designed in 0.18&mgr;m CMOS technology, one version of the temperature sensor has a simulated sensitivity up to 207.1mV/ºC while consuming 2.23mW of power. A low-power version has a simulated sensitivity of 185.7mV/ºC with 1.13mW power consumption. The sensor was re-designed in 0.11&mgr;m CMOS technology for fabrication of a prototype chip with a power consumption of 0.6mW. This sensor has a measured sensitivity of 395.4mV/mW to power dissipation in a DUT that is located in its vicinity on the chip. | Keywords/Search Tags: | Sensor, Built-in testing, DUT, Power dissipation, CMOS, Temperature, Sensitivity | | Related items |
| |
|