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Analysis and Design of Power Efficient Passive RFID Tag

Posted on:2017-05-14Degree:M.SType:Thesis
University:North Carolina Agricultural and Technical State UniversityCandidate:Abdat, Feras FFull Text:PDF
GTID:2458390005482892Subject:Electrical engineering
Abstract/Summary:
Near Field Communication (NFC) technology is widely used in numerous industries for tasks such as tracking objects, control access, and sharing information. NFC is a wireless communication technology that has the ability to transfer and receive data between several electronic devices, similar to Infrared or the widely known Bluetooth. This technology builds on Radio Frequency Identification (RFID). Previously, RFID technology had been limited because of the standardization and high cost of the production. Also, it motivates many organizations to develop specifications and characteristics of designing the technology. Therefore, NFC technology was approved as an ISO/IEC standard in 2003. NFC is a technology that lets devices to communicate to each other in a short range of radio frequency and operates at 13.56 MHz, which means that near-field communication devices operate at the same range of frequency as the High-Frequency RFID systems. These days, new technologies have several obstacles in their designs. Hence, the objective of this thesis is to design and implement an analog front-end (AFE) of a radio frequency identification (HF-RFID) tag architecture, which works in a great condition of performance and an excellent power efficacy. This work presents the cross-connected NMOS-PMOS bridge rectifier, which is one of the qualified structures for improving the power efficiency. The architecture design of the rectifier shows power conversion efficiency almost 60% for a 5 volt input signal. The technology used in the proposed RFID system is 0.18 ?m CMOS process.
Keywords/Search Tags:RFID, Technology, NFC, Power
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