| The objective of the dissertation is to develop a vertically integrated framework for soft-hardware-technology co-optimization for low-power digital systems. Such co-optimization has been difficult due to the complexity of the optimization problem and the fact that the optimization parameters stretch across software, hardware and technology parameters. The proposed framework for power optimization in the dissertation shows that while energy saving is possible using software, hardware and technology optimization individually, much larger savings are possible if a vertically integrated power optimization approach across software, hardware, and technology boundaries is undertaken. The key contribution of this thesis is the formulation of a hierarchical delay-driven power-optimization approach that can be applied to architectural modules as well as gate-level design. Using architectural-level studies of module usage and activity, it is shown how low-level physical design and technology parameters can be selected to minimize power consumption. The proposed work in this thesis will impact cross-disciplinary research in the areas of solid-state microelectronics, computer architecture and computer science. |
