Testing platform for a low voltage differential signal gigabit communication module

High-speed data transmission using low-power solutions is among the most challenging research topics nowadays; every day the world is demanding low-power platforms working at high speed and communication between modules has become critical. Many solutions in terms of efficient ways to send buses of data have been created; the most remarkable one at this time being the SERDES (Serializer/Deserializer) solution.; This thesis describes the testing of a platform for high-speed and low-power communication. A commercially available SERDES from National Semiconductors (DS92LV16) and the XSA-50 Board from XESS Corp are being used. A custom designed daughter-board as well as synthesizable logic interfaces were created. The VHDL code required to evaluate the module performance was developed and successful testing results were achieved.; The goal of the project is to use the platform as an educational module for one of the courses taught at University of Delaware, Electrical and Computer Engineering Department. This requires the development of VHDL templates and test benches that can be used for further academic purposes.