| Since the CMOS technology is advancing rapidly, there are several new device structures being invented to counter the disadvantages of the previous generation. One of the attractive devices in this realm is Nano-wire Surrounding Gate FET (SGFET) which is built vertically and has gate wrapped all around the channel. This thesis will investigate the noise performance of transistor at high frequencies for its application in designing RF Low Noise Amplifiers. This is the first time that a study has been done on noise characteristics of SGFET.;The thesis presents a novel approach for noise parameter extraction of MOSFET. This method, called Direct Matrix Analysis, can be used for very complex models which makes the analysis easier.;The scaling of planar MOSFET's was done to compare the noise characteristics of 3-D and planar devices. Various scaling theories were investigated and then Constant Field Scaling Theory was applied to scale down the MOSFET's. |
