Design and measurement of parameter-specific ring oscillators

Electronic monitoring utilizing process-specific Ring Oscillators (RO) is explored as a means of identifying, quantifying, and modeling sources of variation in circuit performance due to manufacturing and layout design parameters. This approach is motivated by the need to mitigate the increased impact of process variability on circuit performance in the scaling of CMOS. To reduce such impact, there is a need to monitor, analyze, and understand process variation in order to improve current design methodologies. This work contains the first measured silicon results for the utilization of parameter-specific modification of ring oscillator layouts to electronically monitor particular process variation. Design and testing for this work were made possible through the Berkeley Wireless Research Center. The working circuits were fabricated by ST Micro in a 45 nm fabrication process that was under development.;The measured RO frequency sensitivity to gate focus monitors shows that they are about 4% slower than the control ROs. This decrease is attributed to parasitic effects as well as the non-uniform 'hour-glass' shape produced at the top and bottom of the gate from the horizontal extensions used to increase focus sensitivity. The pre-programmed gate-to-active misalignment monitors show a 2--4 nm overlay error for 17 chips. The fact that the experimental measurements are less sensitive than predicted during the design stage is in part attributed to the fact that the wafer was run under unusually good control without any programmed treatments such as defocus. This observation is supported by the fact that the measured range of RO frequency was typically centered and 1/6-1/4th of the SS-FF guard band. The unanticipated requirement to apply strong OPC techniques with scatter-bars to the monitor designs in order to guarantee that they would not impact product yield also resulted in considerable sensitivity loss. This loss not only occurred for the layout monitors with isolated gates, but also for the active 'H-shape' misalignment monitors where process variation of the active layout including its height and curvature at the off-set gate position was reduced.;The Nitride Contact Etch Stop Liner (CESL) strain-induced monitors show a ring oscillator frequency increase of 5.3% and 13.9% for 1.8X and long length source/drain diffusion (LOD) respectively as compared to minimum LOD, after the normalization of raw data to simulation data so as to correct for parasitic effects. This increase is due to increased CESL-induced strain for large LOD. For the same LOD, asymmetrical designs show a 3% ring oscillator frequency increase for larger source LOD than that of larger drain LOD, indicating transistor injection velocity as well as mobility is important. These layout geometries are simulated by Nuo Xu in order to model CESL's impact on mobility and injection velocity. The measured RO frequencies show that the 45nm devices operate in a regime between the mobility and velocity injection models.;The random variation of RO circuit performance for a given layout monitor within a chip is examined for 3 sources of variations: changes in gate length (DeltaL), gate oxide thickness (DeltaTox), and channel doping (DeltaNch). The strategy here is to make a linear approximation of the measured RO frequency sensitivity to these 3 parameters under 5 distinct combinations of operating voltages and temperatures using the 45nm PDK BSIM4/PSP models. The strategy is implemented using least mean square (LMS) analysis. Measured block means were used on one outlier chip that showed 5% slower RO frequency in a third block. For all of the blocks, the LMS results indicate that the source of random within-chip variation is dominated by random dopant fluctuations in comparison with changes in DeltaL and DeltaTox. Since the decrease in RO frequency for the third block was similar for the two focus and control monitor-pairs, the decrease in measured RO frequency is unlikely to be due to a change in focus.;This thesis demonstrates that "parameter-specific ring oscillators" are suitable for multiple critical applications in quantifying systematic and random effects in the co-optimization of process development and circuit design. While parameter-specific RO monitors provide a permanent record of process effect, they are best used during process development and calibration, when less stringent design rules, no-OPC drop-ins, and programmed treatments can be accommodated, yielding inverter layouts with higher as well as directly verifiable sensitivity to process variation. (Abstract shortened by UMI.)...