| Power consumption is a major concern in the present chip design industry. Complementary Metal Oxide Semiconductor (CMOS) technology scaling has led to an exponential increase in the leakage power. The excessive power dissipation can result in more heat generation, which in turn increases the temperature. According to Intel's source, power density increased to a value of 1000 W/cm2 and is approaching the value which is equal to the radiation from the sun's surface (10000 W/cm2). This leads to reliability issues in nanometer-scale CMOS as Silicon starts melting at 1687K. To resolve this issue, we introduce a novel architecture to design nanoelectromechanical switches and implementation results with virtually zero leakage current, ∼1 V operation voltage, ∼1 GHz resonant frequency and nanometer-scale footprint. Microelectromechanical Switches (MEMS) have very low "on" and very high "off" resistances. Their switching voltages are usually high (5-50 V), switching speeds are usually low (1 MHz) and their footprints tend to be very large (many um2). We have designed and fabricated devices with very low actuation voltages and very high speed using tuning fork geometry compatible with conventional CMOS fabrication technologies. This unique switch geometry decreases the actuation voltage by a factor of 1.4 and doubles the switching speed. It consists of a cantilever beam that acts as a ground plane. Upon actuation, both the ground plane and the switch's main beam move towards each other that makes the center of mass stationary during switching and thus, the switching speed doubles. These tuning fork nanoelectromechanical switches can be readily implemented in Very Large Scale Integration (VLSI) circuits to manage leakage power. The thesis will describe the Nanoelectromechanical systems (NEMS) structures, their characteristics, leakage reduction techniques, reliability of the devices and piezo actuator structures to determine contact resistance and longevity of switches. |
