| Complementary metal-oxide semiconductor (CMOS) image sensors (CISs) have brought a huge popularity to various imaging applications due to advantages over charge-coupled device (CCD) image sensors such as system-on-a-chip (SOC), lower power consumption, and lower cost. The dynamic range (DR) and signal-to-noise ratio (SNR) are key parameters that determine the performance of an image sensor. Previous efforts to improve CISs include voltage-mode CISs and time or frequency-mode CISs.;The voltage-mode CISs could achieve wide DR easily; however they suffer from low SNR and they usually require complicated circuits to adjust integration times. The time or frequency-mode CISs, on the contrary, provide simpler system architectures with higher SNR and visually low fixed-pattern noise (FPN) due to pixel-level implementations. Recent endeavors have tried to improve the performances by exploiting both voltage and time using self-reset techniques; however they still suffer from many problems, such as too many transistors with low fill factor, larger FPN, and SNR degradation due to noise accumulation.;In this thesis, a new self-reset CIS with offset-cancellation using a Schmitt trigger circuit has been developed to overcome those problems and maximize the benefits of both time and voltage in photointegration. It provides both wide DR and high SNR simultaneously as well as achieves higher fill factor with less components which is essential for pixel-level CMOS imagers. |
