Nanoscale phase change memory: Device structure and material characterization

Solid state memories can store and retrieve large quantity of data at high speed. Solid-state non-volatile memory keeps information when power is turned off. The market for non-volatile memory (NVM) technology has grown substantially in recent years because of the emergence and application of many personal portable devices. However, Flash memory, the dominant NVM technology, is facing scaling challenges due to its fundamental limitations. As a result, research in various new memory technologies have been explored and accelerated. Among all the emerging NVM technologies, phase change memory (PCM) is one of the most promising candidates for the next generation, given its simple structure, high scalability, fast programming speed and long endurance. In this thesis, PCM cells with new nanoscale structures were proposed and demonstrated.;To scale down the phase change memory devices, we need to understand the phase change material properties in nanometer regime. Phase transition on both blanket film and the nanodot samples were studied, and size dependence was observed. We proposed a method to fabricate sub-20nm phase change nanodots by using self-assembled diblock copolymer lithography. X-ray diffraction, applied to the nanodot samples, showed crystallization transition for l5nm size particles for several phase change materials. This diblock copolymer patterning technique was also implemented to fabricate devices with small contact areas. The device programming region is composed by multiple 20nm contact holes. 40% reduction in RESET current was achieved compared to a conventional pore structure, due to the reduction in actual programming area. The same diblock copolymer sub-lithographic patterning was utilized to integrate PCM arrays.;Unidirectional programming and reading for phase change memory requires selection device in a memory array structure. Having a diode selection device can not only reduce the leakage current, but also have the potential to further increase the area density of phase change memory cells, by either minimizing single cell size or 3D-stacking of cross-point memory layers. Germanium nanowire has good scalability, low processing temperature and high conductivity, which can be a good candidate for selection device. After discussing the bottom-up synthesis of Ge nanowire growth mechanism and investigating its deterministic control. We demonstrated the phase change memory cell structure utilizing in-situ doped crystalline germanium nanowire diode. The vertical nanowire diode serves as the bottom electrode and selection device. The integrated memory cell shows promising characteristics such as low programming current, large SET/RESET resistance ratio, and rectifying behavior, which is required for high-density, 3D cross-point memory. The small contact area determined by the diameter of nanowires enables low programming current below 200microA for RESET and 501muA for SET. The average resistance ratio of SET/RESET state programmed by repetitive pulse programming is 82 which is large enough for large array operation. The heterojunction formed between in-situ doped Ge nanowires and Si substrate provides 100x isolation for cross-point memory operation.