| The objective of this thesis research is to evaluate the feasibility of implementing a spindle motor controller using Altera Cyclone II Field Programmable Gate Array (FPGA). The spindle motor controller is a DSP (Digital Signal Processor) based real-time embedded system that determines the trajectory of the spindle movement and periodically adjusts its position. A traditional spindle motor controller consists of a DSP processor and a set of peripheral IC's. Implementing the spindle motor controller using Cyclone II FPGA which is an integration of the reconfigurable embedded processor and programmable logic elements, can significantly reduce the hardware cost. However, the main challenge is how to configure the embedded processor to meet the stringent real-time performance requirements. In this research work, the spindle motor control program is ported to the Cyclone II based System on a Programmable Chip (SoPC) and the performance is characterized. The results are analyzed to answer the following three questions: (1) Can the NIOS processor provide the required performance for the spindle motor controller, (2) What is the minimum configuration of the NIOS processor that can meet the performance constraint, (3) What is the maximum number of spindle motor controllers that can be implemented using one FPGA. |
