Design Of Interface Circuit Based On CMOS Hall Sensor

This paper mainly studies the design and signal conditioning of Hall interface circuit.The Hall signal output is usually between ?V~mV.The common op amp offset is in a few mV or even a dozen mV.In CMOS integrated circuits,the offset voltage and Low frequency noise has a serious impact on the performance of the op amp.For the relatively weak Hall signal,these undesired factors produce a useless signal that can completely depreciate the Hall signal compared to the useful signal generated by the Hall plate.Therefore,we must try our best to take measures to r educe the noise and offset of the circuit.As a commonly used interface circuit instrumentation amp has a wide range of applications,instrumentation op amps are usually used in high common mode voltage,amplify a small differential signal.Based on the cadence 0.18?m CMOS process library,an independent Hall sensor signal conditioning circuit is designed.The spinning current technology is used for the signal processing of the Hall sensor to reduce the offset and noise effects.Based on a comprehensive analysis of the basic principles of the circuit,the design strives to design a low offset.High gain,low power structure circuit.The overall chip area is 245?m×321?m,dynamic power consumption is 2.72 mW,gain is 200V/V,CMRR is 120 dB,linear regression coefficient is 99.9%,Total Harmonic Distortion is less than 0.1%.