Research And Implementation Of High-Sensitivity CMOS Integrated Hall Sensor Based On The Current-Mode

Hall sensors based on CMOS technology have been widely used in automobiles,consumer electronics,medical electronics,and industrial control,due to many advantages such as low cost,low power consumption,high integration and high reliability.However,the magnetic field sensitivity of the Hall device decreases sharply due to the high impurity concentration of the N-well active region in Deep sub-micron standard CMOS process.At the same time,the unfavorable factors such as mask alignment mismatch,non-uniformity distribution of impurities in active area and the stress of the package lead to the serious offset of CMOS Hall device.In 0.18 ?m standard CMOS process,the extremely low magnetic field sensitivity and severe offset of Hall device make it difficult for Hall sensors to accurately detect magnetic field.Therefore,based on 0.18 ?m standard CMOS process,the structural parameter optimization and offset elimination of Hall devices are studied in this thesis.The main research contents and results are as follows:(1)The structural parameters of the CMOS Hall device are optimized in the current-mode,and a cross-like Hall plate with optimal performance is obtained.Based on 0.18?m standard CMOS process,an analyticcal geometric model of a cross-like Hall plate operating in current-mode is established.With this model,the influence of different length-to-width ratio(L/W)on the current-mode sensitivity and SNR of the cross-like Hall plate is analyzed.And the device simulation software named Silivaco TCAD is used to perform 3D modeling and simulation of the cross-like Hall plate with different L/W.Finally,the cross-like Hall plates with different L/W dimension are taped out based on SMIC 0.18 ?m standard CMOS process.The accuracy and reliability of the analytical geometric model are verified by the simulation results and the test results of the Hall device,and show that a cross-like Hall plate can achieve optimal current-mode sensitivity and SNR in the device L/W range of 0.4–0.5.The analytical geometric model provides a theoretical basis for the current-mode cross-like Hall plate and provides guidance for further optimization of its structure.(2)A new type four-phase spinning current dynamic offset elimination technology is researched to effectively eliminate Hall device offset and 1/f noise while amplifying the Hall signal.Based on the four-phase offset signal characteristics of cross-like Hall plate,a new four-phase spinning current dynamic offset elimination technology is proposed.This technology includes a spinning current circuit and a current integration circuit.The spinning current circuit modulates the operating frequency of the Hall device to a high frequence and controls the polarity of the Hall signal and the offset signal.The output signal of spinning current circuit is sent to the current integration circuit for completing the conversion of the current signal to the voltage signal.Based on 0.18 ?m standard CMOS process,the four-phase spinning current dynamic offset elimination circuit is simulated by means of Cadence virtuoso.The simulation results show that the offset elimination technology effectively eliminates the 1/f noise and offset signal of the Hall device,and amplified the hall signal to 38 m V.This study avoids the failure of Hall device caused by its offset,and reduces the influence of offset on magnetic field detection accuracy.(3)A fully integrated CMOS Hall sensor with extremely low residual offset and high linearity is designed and implemented.In order to eliminate the residual offset of the Hall device and the fourphase spinning current dynamic offset elimination circuit,a current-mode Hall signal conditioning circuit is proposed.Based on the four-phase spinning current dynamic offset elimination circuit,the secondary offset elimination process on Hall device is carried,which effectively eliminates the residual offset of the Hall device and the signal conditioning circuits and improves the detection accuracy of the magnetic field by the Hall sensor.Finally,the designed Hall sensor is taped out based on SMIC 0.18 ?m standard CMOS process.The measurements show that the static power consumption of the Hall sensor is 15.4 m W,the linearity of Hall output voltage is greater than 99.9% in the magnetic field range of-200 m T to 200 m T,magnetic field resolution as low as 2 m T,and the residual offset is less than 72 ?T under 3.3V supply voltage.