Study And Design On Circuit Of High-precision Low-power Reconfigurable GNSS Radio Frequency Receiver

In the wake of rapid development in global satellite navigation system(GNSS),users' demands for accuracy of navigation and positioning continue to increase.Traditional single-mode single-frequency receivers have been unable to meet the increasing demands of users.GNSS receivers are developing towards multi-mode and multi-frequency receiver with higher accuracy and higher reliability.As RF front-end is an important part of the receiver,the multi-mode multi-frequency GNSS RF front-end have also become a research hot spot.This paper presents a design of a reconfigurable multi-mode multi-frequency RF front-end which supports BD B1/B2,GPS L1/L2,and GALILEO E1 signals.Through the analysis of the signal characteristics and the unification of IF frequency,the design of the simplest RF front-end architecture is realized to achieve the design requirements of low power consumption and low cost.The key circuit modules:reconfigurable multi-frequency low noise amplifier,passive mixer,OTA-C complex filter and frequency synthesizer were analyzed and designed in detail.The multi-frequency low noise amplifiers was designed carefully.Circuit reconfigurable structure was adopted to achieve multi-band support.And partial source degeneration structure was adopted and optimized to enhance LNA's performance,which achieved5 d B gain improvement and 0.1d B noise performance improvement without changing input matching network design or increasing power consumption and circuit area.The designed LNA achieved performance improvements with the simplest circuit modification and extremely low cost.The passive mixer consists of a passive mixer core and a transimpedance amplifier.To make up the linearity shortcoming of the transimpedance amplifier,based on the technology of improving the linearity with negative resistance,an additional negative resistance circuit is connected in parallel at the input of the TIA,which achieves a linearity improvement of 9d Bm at a cost of 5%power consumption.The designed TIA effective improved the linearity of the entire Mixer.To meet the linearity and adjustable bandwidth requirement of the OTA-C complex filter,high linearity adjustable OTA unit was designed based on the current mirror of the voltage flip follower and signal attenuation technology.At the consideration of phase noise and multi-frequency output requirements of frequency synthesizer,circuit of voltage controlled oscillator and programable divider were analyzed and designed in detail.The reconfigurable multi-mode multi-frequency RF front end of this design is implemented based on TSMC 0.18 ? m CMOS process.The simulation results showed that the RF front end achieved gain of 63 d B and 69 d B,noise factor of 1.6d B and 1.5d B,IIP3 of-41.5d Bm and-48.2d Bm at 1.2 GHz and 1.57 GHz.The IF bandwidth can realize 2/4/20 MHz switching,and the image rejection ratio is 23 d B,29 d B and 30 d B,respectively.The phase noise of the voltage controlled oscillator is-129 d Bc/Hz@1MHz /-123 d Bc/Hz@1MHz.The designed RF front end consumes a total of 19.4mA current for single channel at an operating voltage of 1.8V(21mA in BD B2 mode).