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GaN Power Amplifier Based On 6-inch Process Technology

Posted on:2021-01-10Degree:MasterType:Thesis
Country:ChinaCandidate:G YuFull Text:PDF
GTID:2428330626955975Subject:Electromagnetic field and microwave technology
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As an important module of wireless system,microwave transceiver front-end components are widely used in radar and communication systems.In addition,the power amplifier is the core device of the transmission link,it plays a vital role for the whole wireless system in the signal transmission distance.As the representative of the third generation semiconductor technology,GaN High Electron Mobility Transistor(GaN HEMT)has been increasingly applied to the design of high-frequency and high-power devices due to its high cutoff frequency,high power density.At present,the 4-inch GaN process is already mature while the 6-inch GaN process is still in the development and improvement stage.In this paper,we studied the design of high power amplifier(HPA)based on the Hiwafer NPA25,a 6-inch SiC-based GaN process with the gate length of0.25?mfrom Chengdu Hiwafer,following are the main work of this article:1.Aiming at the problem of poor flatness caused by the gain roll-off of the transistor in the design of broadband power amplifiers,a positive slope design was adopted in the inter-stage matching network to offset the influence of the transistor's gain roll-off,a 2-6GHz ultra-wideband high-power amplifier chip was fabricated.The measured results show that in the band of 2.3-6.4GHz,the output power is greater than 43dBm,assotiated with more than 26dB power gain,and the power added efficiency(PAE)is higher than29.3%;what's more,the small signal gain is greater than 30dB,but the input return loss is just better than 4.9dB.Further,in view of the shortcomings of the chip's large area and poor input return loss,the technology of chip miniaturization and method of improving input return loss were studied.By using lumped components such as capacitors and inductors in the matching network of the input and the first stage,the chip area is reduced from 5.8*4.2mm~2 to 5.3*4.2mm~2,the area is decreased by~9%.Moreover,the lossy components are adopted in the input stage and improved the input return loss by more than 5dB.The measured results under large signal conditions show that in the band of2.3-6.4GHz,the output power is greater than 43dBm,with the power gain more than 27dB,and the PAE higher than 25.9%.Finally,the frequency characteristics of the chips shift to high frequency by 300MHz is analyzed.2.For the problem of the current domestic 6-inch GaN HEMT process with the gate length of 0.25?mhas small gain in the Ku band,which makes it difficult to realize high-gain amplifiers,a four-stage cascade structure is used to design a 20W 15-17GHz power amplifier which with high gain,the chip area is 5.1*4.1mm~2.The tested results show that in the range of 15.4-17.2GHz,the output power is greater than 43.4dBm,the power gain is more than 18.4dB,and the efficiency is higher than 22.2%.Then,the frequency characteristics shift to high frequency by 400MHz is discussed.Afterwards,the effect of amplitude and phase consistency between the ports of the last-stage matching network on the performance of the chip was studied.
Keywords/Search Tags:GaN HEMT, high power amplifier, ultra-wideband, Ku-band
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