Research On Large Signal Modeling For CMOS Transistor Technology

In recent years,the rise of smart homes and the rapid iteration of communication devices such as mobile phones and computers are inseparable from the rapid development of the Internet of Things and wireless communication technologies.What plays an important supporting role behind these market demands is the wireless communication integrated circuit industry.The CMOS process has occupied an increasingly important position in integrated circuits.Except for some circuits that require extremely high performance and high-speed digital circuits,the CMOS process can meet most of the design requirements.Moreover,the CMOS process has the characteristics of large-scale integration,and has the advantages of mature process and low cost.As the cut-off frequency of CMOS becomes higher and higher,and the process nodes continue to decrease,CMOS has also begun to shine in the RF field.But again,because it works at high frequencies,this makes some electromagnetic effects of the transistor more complicated,and some parasitic reflections that do not appear at low frequencies also begin to appear.Therefore,how to accurately describe the input and output characteristics of a transistor in a wide frequency domain becomes very important.The accuracy of the transistor characteristics will directly affect the accuracy of the circuit design and the success rate of the first tape-out.Based on this,a series of researches have been done on the modeling of transistors based on CMOS technology.First,this article briefly introduces the background and model classification of MOSFETs,and also outlines the development of intensive models.Secondly,some working principles,basic physical effects and BSIM4 models of MOS devices are briefly introduced.Then,small-signal modeling was performed for the 65nm CMOS process transistor.The first step in small signal modeling is to first use the Open-Short two-step de-embedding method to de-embed the measured S parameters.Secondly,an intrinsic model is established according to the basic physical structure of the transistor,as well as some parasitic effects and new physical effects brought about at high frequencies to establish corresponding models.Finally,the S-parameters after de-embedding are used for verification.This paper presents an improved small-signal equivalent circuit model that takes into account the coupling of multi-finger interconnects to ground.Comparing the model results and test results,it can be found that the network improves S₁₁ and S₂₂ at high frequencies Time accuracy.Secondly,this paper studies the large signal model based on the BSIM4 model.Although the BSIM4 model has a more accurate physical description and considers more high-frequency effects than previous models,some parasitic effects are still not very accurate.Therefore,according to the structure of the device,a suitable parasitic network is selected.The built-in BSIM4 RF model is compared with the small-signal S-parameters.The model can well describe the transistor characteristics in the range of0.1GHz to 43GHz.Then,the DC parameters of BSIM4 are extracted and optimized according to the I-V characteristics of the device,so that it can better characterize the nonlinear DC characteristics in the entire working range.Finally,the large-signal model and load traction were established.The output power（Pout）,gain（Gain）,additional power（PAE）,and load traction results all achieved high accuracy.