Design Of Low-Power Multimode Multiband Receiver For Internet-of-Things Applications

With the rapid development of mobile communication,especially Internet-of-Things,smart phone,car,smart home,security,agriculture will be all linked together.Due to the explosively increasing number of connections,various communication standards(such as BLE,Zig Bee,NB-Io T,etc.)with different operating frequencies are undergoing rapid evolution.In order to connect all these terminals under different communication protocols,multi-band multi-standard reconfigurable low-power receivers for Io T applications are in great demand.The receiver in this thesis adopts low-IF architecture,with advantages of relatively simple structure,high integration level,and without DC offset and image interference issues.The multi-band multi-mode receiver is composed of low-noise amplifier,mixer,transimpedance amplifier,low pass filter and so on.In the multi-band multi-mode lownoise amplifier,a simultaneous tuning of both inductor and capacitor is proposed and adopted,as a result the amplifier can work at 900 MHz,1800MHz and 2400 MHz with little chip area overhead.In addition,by adjusting the signal flow direction of the gate input inductor,the source degeneration inductor and the drain load inductor in the amplifier,these three inductor magnetic fields align in the same direction and reinforced mutually,the inductor Q values are increased,the amplifier noise figure is reduced and the voltage gain is increased.In this receiver,the mixer is a double-balanced currentmode passive structure driven by 25% duty-cycle quadrature clocks,with high linearity and no 1/f noise.There are many uncertainties during the chip manufacturing(such as process corner deviation,component mismatch,etc.),which lead to IQ mismatch,operation point deviation.In order to reduce the influence of these uncertainties on circuit performance,adjustment circuit for these design issues are designed in this thesis.By adjusting circuit parameters,the receiver works under the desired conditions.The multi-band multi-mode receiver has been simulated and manufactured in TSMC 65 nm CMOS technology,with chip are of 1600?m×940?m.The measurement results show that the gain of the receiver is 73 d B,76 d B and 75 d B and the S11 is-17 d B,-34 d B and-25 d B respectively in three frequencies.Under QPSK modulation,the measured EVM is 5.5%,4.7% and 5.2% respectively.The power consumption of three bands(including local oscillator buffer and divider)is 19.8,21.6 and 22.8 m W,respectively.According to the measurement results,this paper optimizes the input transformer of the LNA and adds a capacitor tuning array to the LNA output.Three solutions were proposed and designed for the DC offset problem.The circuit design,simulation and layout of the multi-mode multi-band receiver secondary tape out are completed in this paper.The improved circuit has a significant improvement in noise performance.