High Linear Wireless Communication Receiver Rf Front-end Research And Design

Different modes and bands coexist for mobile communication systems nowadays. Mobile terminals supporting multiple modes and bands are highly demanded. Meanwhile, the system integration level is becoming higher and higher for lower cost. One key issue for these developments is the design on multi-mode multi-band RF transceivers. This thesis targets for receiver RF front-end circuits and systems with mobile communication applications.After a review on basics of wireless receivers, including specifications and system architectures, the features of WCDMA and GSM standards and system requirements are analyzed. Considering the system requirements and design challenges, broadband and narrowband multi-mode multi-band receiver RF front-end schemes are studied, and linearization techniques in device, circuit and system levels are summarized and analyzed.Based on the summarization and analysis of linearization techniques, a high-precision sweet-spot biasing circuit is proposed. The proposed circuit can generate the biasing point at the zero crossing point of the device third-order transconductance coeffient automatically. Compared with conventional circuits, the proposed circuit can generate the sweet-spot biasing with a higher precision, especially in deep-submicrometer CMOS applications. To alleviate high frequency effects, a tunable-active-inductor-based harmonic suppression technique is proposed. Compared with conventional means, the proposed method not only saves chip area, but also is robust. These two proposed techniques are applied in a high linear Gilbert mixer in0.13μm CMOS. The proposed linearization techniques are verified by experimental results.A WCDMA/GSM receiver RF front-end is also presented in this thesis. It supports SAW-less operation for WCDMA. The system architechture and block circuits are discussed. The introduction on block circuits includes the low noise transconductance amplifier, the current-mode passive mixer, the quadrature LO generation, etc. The thesis focuses on the linearization and digital assisted techniques in both the system and circuit design. Tricks for robustness and circuit parameter optimization are also studied. Experiment results show that the receiver RF front-end, implemented in0.13μm CMOS, satisfies all the WCDMA/GSM specifications. The proposed receiver RF front-end has been successfully applied in a WCDMA/GSM transceiver SOC.