Research And Design Of Silicon-based Voltage-Controlled Oscillator

Technology changes life,with the advent of the 5G era,the interconnection of all things becomes possible.The booming communication system behind it has consolidated the foundation.High-speed,low-latency,stable and reliable communication transceivers have more urgent needs,and circuit designers are also facing new challenges.The voltage-controlled oscillator is regarded as the heart of electronic circuits and provides the local-oscillator or clock signal for the system;silicon-based processes have been widely used due to their low cost and excellent digital compatibility.However,the defects of the silicon-based process itself,such as high noise and high passive loss,limit the performance of the silicon-based voltage-controlled oscillator.Because of this,silicon-based voltage-controlled oscillators have become a research hotspot in the academic and industrial circles.Research on silicon-based voltage-controlled oscillators has a long history,and new structures and new theories have been proposed one after another.This article first summarizes some classic oscillator structures and analysis theories in recent decades,and summarizes methods to improve oscillator phase noise based on the analysis conclusions.In addition,the innovation of passive components in oscillator design has been paid more and more attention,and many structures based on new inductors and transformers have been proposed.Therefore,in this paper,the passive devices are described in detail,and the key loss mechanisms and optimization methods are compared and verified by simulation.A 7GHz voltage-controlled oscillator is designed in this paper;the oscillator is designed using 65nm CMOS process.In order to improve the phase noise performance,a high-Q F₂₃ inductor is proposed.This inductor,when combined with a single-ended capacitor,can simultaneously realize the second and third harmonic resonances;the introduction of harmonics reduces the sensitivity of the oscillator to noise.Therefore,the phase noise performance in the area of thermal noise and flicker noise can be significantly improved.The core area of this oscillator chip is 300um×700um,and it consumes only5-mW power consumption at a low supply voltage of 0.55-V.The measured output range is 6.8-7.66GHz,and the relative bandwidth is 12%.For a 6.8GHz signal,the phase noise at the 1-MHz frequency offset is-117dBc/Hz,the FOM reaches 187dBc/Hz,and the flicker noise inflection point is only 200 kHz.In order to solve the problem of insufficient low-frequency spectrum resources,millimeter-wave communication systems are being actively developed.Aiming at this scenario,this paper designs a harmonic-multiplexed voltage-controlled oscillator based on a 180-nm CMOS process.In this chip design,the harmonics in the low frequency oscillator are multiplexed,and the millimeter wave output signal is obtained after direct amplification.In addition,in order to make the layout and wiring more convenient,the chip is designed based on a transformer.The simulation data shows that compared with other oscillators in the same frequency band,the harmonic suppression ability is significantly improved to reach 30dBc.Thanks to the third voltage generated at the source,harmonic tuning is also carried out,hence the phase noise performance will be improved;for a 24GHz signal,it reaches-106dBc/Hz at a 1-MHz frequency offset,and FOM reaches a 185dBc/Hz better level.