Research Of Subset Adaptive Importance Sampling For Fast Yield Analysis Of SRAM

With the development of the integrated circuit industry,SRAM has become an indispensable part of electronic products.The research of SRAM has always been one of the hotspots in the IC industry.Because of advanced process and low voltage applied,significant reduction of SRAM design margin and the decreasing tolerable failure probability problem arise.As a result,too much simulation resource will be in demand when traditional methods based on Monte Carlo for yield analysis are used.Meanwhile,methods based on Importance Sampling,such as HDIS and HSCS,are highly dependent on the quality of distorted sampling distribution.the existing failure-region-searching scheme may fail to promote a sufficiently good sampling distribution,and it becomes more difficult when the circuit is more complicated and there are multiple failure regions.Therefore,it's important to adopt a new fast yield analysis method to improve the efficiency of SRAM design.This thesis designs an advanced algorithm called Adaptive Importance Sampling to solve the above challenges based on Population Monte Carlo method and Importance Sampling method after careful analysis of shortcomings of traditional Monte Carlo method and current fast yield analysis algorithms.The Subset Adaptive Importance Sampling algorithm can be divided into two parts: initialization and adaptation.For initialization,hypersphere sampling rather than uniform sampling is utilized for presampling in consideration of efficient exploration of failure regions,which can quickly search the space and ensure that the initial samples will not miss any failure regions.The adaption part makes up of three steps: sampling,weighting and adapting.In this part,this theses designs a global updating strategy based on resampling algorithm,and then optimizes it with Metropolis Hasting algorithm,and finally designs a subset updating strategy to combine these two strategies.The excellent performance of SAIS is verified by three classic circuits: 6T-SRAM cell,sense amplifier and SRAM arrays.For a 6-T SRAM cell,the failure mechanism of which is relatively simple,SAIS algorithm can operate normally.The superior performance of SAIS algorithm is then verified by experiments on sense amplifier with multiple-failure-region problem.Thirdly,The SRAM array is a combination of SRAM cells and sense amplifier.In this scenario,the error of SAIS is 12.9%,while the error of HSCS algorithm is 37.6%;in other words,SAIS is 1096 times faster than the Monte Carlo method,and 5.2 times faster than HSCS.