Implementation And Optimization Of SRAM Fast Yield Evaluation Method In Multi-failure Regions

With the development of technology and the improvement of SRAM integration,the problem of SRAM yield caused by random process fluctuations is becoming increasingly prominent.The Monte Carlo method requires a large number of simulations when evaluating yield,which is time-consuming.Besides,caused by the multi-failure mechanism of the circuit or its own structure,the failure samples exist in multiple failure regions,which makes existing yield evaluation methods of accelerated MC inaccurate.It is a challenge to quickly and accurately obtain the yield of SRAM in multiple failure regions.The thesis starts from AIS and its two improved algorithms,SSAIS and ACS,to study the fast yield evaluation methods of SRAM in multiple failure regions.Based on the main process of AIS,combined with the scaling variance of SSAIS and the clustering strategy of ACS,and optimized the weight calculation and parameter update stages for the lack of sample diversity,the thesis obtains the SSACS algorithm.SSACS constructs an excellent distorted sampling distribution by changing the weight calculation method and finding the optimal parameters.In the weight calculation stage,the failure probability weight instead of the importance weight is used.Consider multiple failure regions,it weakens the impact of weight extreme values on other failure samples,and reduces the possibility that the descendant samples are all from the same failure region or the same extreme sample,thus alleviating the lack of sample diversity.In the parameter update stage,the mean,the mixing coefficient and the variance are adaptively updated.The roulette algorithm based on the failure probability is used to update the mean,which can quickly identify the failure boundary.The ?adjustment strategy is used to update the mixing coefficients,by introducing a small number of non failure samples in the early stage of the iteration to increase sample diversity.The variance is updated based on EM algorithm to further reduce the number of simulations.Based on the SMIC40 nm process,the verification circuit is a bit cell and a sensitive amplifier.The performance indicators of the bit cell are read delay,write delay and read noise margin,and the performance indicator of the sense amplifier is the offset voltage.The bit cell experiment shows that the error of SSACS is 1.5%,the speed of SSACS is 1931 times of MC,and 1.92 times and 1.69 times of ACS and SSAIS seperately.The SA experiment shows that the error of SSACS is 1.2%,the speed of SSACS is 4027 times of MC,and 2.02 times and 1.70 times of ACS and SSAIS seperately.SSACS can obtain the yield of SRAM more quickly and accurately than SSAIS and ACS in multiple failure regions,and SSACS can more accurately identify multiple failure regions.