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The Design And Realization Of 375MHz-3GHz Broadband Frequency Source

Posted on:2020-08-13Degree:MasterType:Thesis
Country:ChinaCandidate:Q LiFull Text:PDF
GTID:2428330623458228Subject:Engineering
Abstract/Summary:PDF Full Text Request
Frequency source has been a crucial constituent member in communication and radar system.Broadband frequency source,composing the critical part in radar seeker part,serves the purpose of creating broadband local oscillator(LO)frequency and seeker's self detecting signal.Its major indices heftily influence the operating functionality of the system as a whole.In 2015,Ministry of Industry and Information Technology of People's Republic of China had obliged that within ten years,70% of the core electronic components should be domestically manufactured which created a booming environment for exploiting innovative designs.This paper presents a possible model of the broadband frequency source chip with frequency range of 375 MHz to 3GHz which can be applied to actual array-based communication system as well as other implementations.Based on the examination of both foreign and domestic broadband frequency source designs,the paper briefly explains four most commonly used frequency synthesizing techniques as well as their frequency synthesizing principles.Then the design is carried out based on key parameters and indices extracted.The design mainly focuses on two novel Phase Lock Loops(PLL),namely broadband low phase noise Radio Frequency(RF)LO Lock Loop and low jitter output clock Lock Loop,with following major concepts.First,the PLLs use multiple Voltage Controlled Oscillators(VCO)to cover up the entire bandwidth.Each VCO uses switch array to extent the frequency coverage.Second,temperature compensation is applied to VCO oscillating frequency to minimize the correlation of VCO output frequency and temperature,and then further reduce the possibility of PLL relock.Third,specific low pass filter is introduced to filter out the phase noise to VCO caused by biasing circuits such as VCO reference source circuit,temperature compensation biasing circuit,Low Dropout Regulatory(LDO)circuit etc.Last,the design uses low noise reference input source,PFD/CP circuit,low phase noise VCO circuit(with 100 KHz frequency deviation and phase noise less than-110dBc/Hz)as well as source isolation so that low Root-Mean-Square(RMS)amplitude output results could be attained.The design has fully achieved the goal of implementing a 375 MHz to 3GHz broadband frequency source.The source supports various types of output methods including synchronous LO signal and clock signal output,broadband RF LO output,low phase noise,enhanced reference frequency input range etc.The frequency source is integrated with two distinct types of PLLs,broadband low phase noise RF LO Lock Loop and low jitter output clock Lock Loop.The RF PLL supports both integer and fractional division and is integrated with reference buffer,clock divider,PED/CP,broadband VCO,feedback divider,LO output divider,VGA and power driver.It supports 10 MHz ~ 100 MHz reference input with RF output range of 375 MHz ~ 3GHz.The clock PLL supports integer division with output frequency of 30MHz~100MHz.Default input of the clock signal is 48.96 MHz,50MHz and 62 MHz.
Keywords/Search Tags:PLL, frequency source, broadband, low phase noise, low jitter
PDF Full Text Request
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