Modulation Of Effective Work Function In High Dielectric Constant Metal Gate

In our more and more intelligentized and informationized moden socity,defferent kinds of chips play a very important role in development of socity.Chip consists of many types of devices and the basic one is field effect transistor.The performance of whole chip depends on the performance of the single transistor.Therefore,only excellent single transistor has been maunufactured firstly,can top-ranking chip exist.In Metal-Oxide-Semiconductor(MOS)field effect transistor,threshold voltage(Vth)is one of the most important prarameters which can assess the performance of transistor.In current high dielectric constant(high-k)metal gate MOS transistor,effective work function(EWF)is the main factor affecting the Vth and changing the effective work fuction is also main method of modulating the Vth.Therefore,effective work fuction of metal gate has been paid close attention to by researchers.Based on this,the thesis researchs the modulation of EWF in high-k metal gate.Detailed research results as follow:1.This paper optimizes the classical ?Jv-Vg measurement method.Based on the optimized ?Jv-Vg method,this paper firstly researchs the effect of gate size changes in high-k metal gate transistor on EWF in PMOS and NMOS.In a high-k metal gate NMOS transistor using titanium aluminum alloy(TiAl)as a work function metal layer,when the length of the metal gate is reduced from 1 ?m to 30 nm,the effective work function of the metal gate increases from 4.00 eV.to 4.28 eV.When the length of the gate is fixed at 30 nm,the gate width is reduced from 3 ?m to 0.1 ?m,and the effective work function of the gate also slightly increases from 4.20 eV to 4.28 eV.In a PMOS transistor using TiN as a work function metal layer,the length and width of the metal gate have little effect on the effective work function of the gate.2.In this paper,the effect of the thickness variations of the gate efwork function metal TiN layer and the deposition temperature on the gate effective work function and threshold voltage of the device in the gate stack of PMOS is studied.At different gate sizes,after the thickness of TiN is reduced by 10 ?,the effective work function of the metal gate increases,and the increase is in the order of tens of millielectron volts.In the smaller size,the amount of increase is more obvious,and the threshold voltage is also obviously increased.As the temperature of the growing TiN is lowered from the higher temperature Baseline °C to Baseline-130 °C,the corresponding gate effective work function in the device gate increases from 4.62 eV to 4.82 eV.3.The effect of annealing temperature on the gate work function and threshold voltage of MOS devices was investigated.In PMOS transistors with different gate sizes,the annealing temperature is reduced from Baseline °C to Baseline-30 °C,and the gate effective work function is increased by tens of millielectron volts.In NMOS transistors,the annealing temperature after metal interconnection is at this variation has little effect on the effective work function.The innovations of this paper lie on: the classical ?Jv-Vg measurement method has been optimized.The influence of gate's size changes including length change and width change on EWF in short channel high-k metal gate transistor has been firstly sestemically researched.The size effect of EWF in metal gate has been proposed.In addition,the intersect influence of gate work function metal layer's thickness,growth temperature and anneal temperature and gate size changes on EWF has been explored adequately.