A Design Of Hybrid Match-line Structure CAM With High Energy Efficiency

This thesis is dedicated to the development of a new matching structure for Content Addressable Memory(CAM)to solve the problem of very large power consumption in the design of supercomputer chips because of integrated circuit technology into the MEMS age.CAM plays an important role in the high-performance chip,such as the fully associative TLB(Translation Look-aside Buffer)in the microprocessor,the Tag in the Cache.However,the large power consumption of CAM would be vital for these advanced applications.In addition to improve the match speed of CAM,the higher stability and lower power consumption of CAM have become a hot spot.The purpose of this thesis is to design a CAM with high energy-efficiency on the basis of hybrid type match-Line(ML).This thesis designs a hybrid Match-Line structure CAM with high energy efficiency through the comparative analysis of several hybrid Match-Line structures designed in recent years.The design focuses on the improvement of logical control structures and NOR ML.In this thesis,NOR ML-Line adopts the structure of shadow-match-line(SML)sensing which is completely different from the ordinary hybrid match line to reduce voltage swing,and uses the charge-sharing technique to make the SML sensing work successfully.There are three optimizations can effectively reduce the matching delay.Firstly,The second part of logic control structure is composed of a transmission transistor and a buffer to make shadow-match-line when connected to the ML can reach full swing.Secondly,a single transmission transistor is the known fastest ML discharge path.Thirdly,Reduce the series of NAND ML to increase the conduction speed of transmission.Finally,This design gets the most suitable parameters through the theory analysis of the key component.On the basis of the 28 nm CMOS process,the supply voltage is 0.8V,the frequency of 2GHz,the hybrid structure gets a power consumption of 19.5uw,a delay of 63.3ps,and an energy efficiency of 1.234E-15 J.Compared with the known hybrid Match-Line structures,this design is optimized by 32.9% delay,17.7% power consumption and 56.8% energy efficiency,achieving the design goal of high energy efficiency.Meanwhile,the design effectively solve the level jitter problem to increase the stability of the circuit.