Research And Design Of High Efficiency Envelope Modulator For Cellphone Power Amplifier

With the increasing scarcity of spectrum resources,in order to improve the data transmission rate,the traditional simple constant envelope modulation has been developed into complex variable envelope modulation,at the cost of higher PAPR and signal bandwidth.Power amplifier(PA)is one of the main energy-consuming modules of cellphone.In order to achieve undistorted transmission under variable envelope modulation,PA needs to work in high linearity and low efficiency back-off region,thus shortening the working time of mobile phone battery.Envelope tracking(ET)power management technology reduces dc power consumption synchronously when PA input power is low,and effectively improves the efficiency of its backoff region.The core circuit of ET technology is envelope modulator(EM),and the efficiency of ET PA is approximately equal to the efficiency product of both EM and PA,so EM itself needs high efficiency.This paper mainly studies how to improve the efficiency of EM.The research work is divided into the following parts:1.Comparing the existing EM system structure,analyzing their respective advantages and disadvantages,and choosing hybrid envelope modulator(HEM)which composes of linear amplifier and Buck converter,then analyzing its working principle and grasping its dynamic characteristics through the modeling of MATLAB/Simulink.Based on 0.18μm CMOS process and Cadence assisted design,the HEM chip was fabricated.The test results verify the function of this system.2.Based on SMIC 55 nm CMOS process,a HEM chip for 10 MHz LTE envelope signal is designed.The Cadence simulation results show that under 3.3 V supply voltage and 26.2 dBm output power of HEM,the efficiency is 78%,and the system performance achieves the expected goal.3.In order to further improve the efficiency,a 3-level Buck converter is proposed to replace the traditional 2-level structure in order to solve the problem of excessive switching current in low slew-rate input envelope.Firstly,the switching node 3-level control mode is adopted to change switching current slew-rate with the input envelope,which improves the tracking performance of load current and reduces the dynamic power consumption of linear amplifier,thus improving the overall efficiency of the system.Secondly,aiming at the problem of slew-rate limitation of switching current in high slew-rate input envelope,a new parallel dual-switch converter structure is proposed,in which 3-level is used as the main switching converter to provide most switching current,and the second switching converter realized by dead-band control is used as the auxiliary.The higher harmonic component of switching current is compensated at high slew-rate,which further reduces the dynamic power consumption of linear amplifier.The two new system structures are preliminarily validated by MATLAB/Simulink,and the simulation results are consistent with the theory.The dual-switch 3-level HEM circuit system is designed using SMIC 55 nm CMOS process.The Cadence simulation results show that the efficiency is about 81% with 3.3 V supply voltage and 26.2 dBm output power.Compared with the traditional 2-level HEM system,the dual-switch 3-level HEM system proposed in this paper has 3% efficiency improvement.