Research On Low EMI VDMOS Based On Internal Capacitance Optimization

Most switching power supplies are developing in the direction of high speed,high efficiency,and high integration.The problems of electromagnetic interference?EMI?generated by them are getting more serious.At the same time,daily electronic equipment is more and more sensitive to EMI,so EMI issues have become a hot topic of research.Power devices are widely used in circuits because of their high power and high speed,but their various non-ideal effects worsen the EMI in the circuit.Therefore,optimizing the electrical characteristics of power devices is one of the most effective ways to reduce EMI.This paper analyzes the EMI generation mechanism of single-switch power supply circuits firstly in order to find out the parasitic parameters that have a major impact on EMI in power VDMOS devices,and then explains the working principles of common single-capacitor snubber and RC snubber.The corresponding formula is derived and used as the theoretical basis for designing the structure of VDMOS devices.Aiming at the EMI problem of the conventional VDMOS structure during the turn-off process,the single-capacitor snubber and the RC snubber are integrated into VDMOS in three different forms,and the three structures are:1.A VDMOS structure with an integrated single-capacitor snubber is proposed,which integrates a MIM capacitor with a high-K material as an insulation layer at the drain electrode.During the device turn-off phase,the integrated MIM capacitor is used to absorb the energy stored in the load inductor,reducing the induced electromotive force generated by the inductor,thereby reducing the drain voltage slope d V_ds/dt.The simulation results show that compared to the conventional VDMOS structure,the overshoot of the structure is reduced by 378V,and the oscillation duration is reduced from 47ns to 31ns.2.A VDMOS structure with an integrated RC snubber is proposed.This structure forms an RC path by integrating comb-shaped MOS capacitors on both sides of the cell and a drift region resistance.During the device turn-off phase,the integrated RC path can compensate for the inductor current and maintain a low current slope,thereby achieving low EMI.The simulation results show that,compared with the conventional VDMOS structure,the overshoot of the structure is reduced by 366V,and the oscillation duration is reduced from 47ns to 17ns.3.A spilt-gate VDMOS structure with an integrated RC snubber is proposed.This structure forms an internal integrated RC snubber by integrating a comb-shaped MOS capacitor in the JFET area and a resistance in the drift area.Because of its smaller Miller capacitance,the spilt-gate VDMOS can achieve faster switching speed,and the integrated RC snubber can ensure lower EMI during the turn-off phase.Simulation results show that,compared with the conventional VDMOS structure,the overshoot of the proposed structure is reduced by 335V,and the oscillation duration is reduced from47ns to 30ns.