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Study On Polycrystalline Silicon Etching Technology In VDMOS Power Devices

Posted on:2020-08-17Degree:MasterType:Thesis
Country:ChinaCandidate:X J TongFull Text:PDF
GTID:2428330602950455Subject:Engineering
Abstract/Summary:PDF Full Text Request
The full name of VDMOS devices is vertical double diffusion metal oxide semiconductor?VDMOS?,which is a device controlled by voltage.The operating principle is that a conductive channel is formed on the grid voltage control surface,and the current between the drain and the source has many characteristics,such as high input impedance,switching speed block,low driving Power,superior frequency characteristics and good thermal stability.VDMOS devices are high-end products in semiconductor discrete devices,with wide application range,large market demand and good development prospects.It is widely used in many fields,such as Power switch,industrial precision control,drive motor,motor speed regulation,automotive electronics,electronic ballast,audio amplification,hi-fi sound,uninterrupted Power supply,inverter,energy saving lamp,high frequency oscillator,motor speed regulation,inverter,etc.The process technology of IC is developing rapidly.The most important parameter is the characteristic size of polysilicon gate.In the process of VDMOS manufacturing,the quality of polycrystalline gate is significantly correlated with the key parameters of VDMOS IGSS and Vth.In this paper,an AMAT P5000 machine was used to dry etch the experimental object of polycrystalline silicon,mainly to solve the above two problems:1.IGSS parameters of gate source current due to impure etching pair after polycrystalline etching are not up to standard;Through the cavity pressure,Rf Power supply,proportional change of reaction gas flow,cavity magnetic field four main influencing factors,The four factors are controlled separately.Each factor sets three sets of different parameter levels,and then the effect of process parameters on the non-crystal etching is obtained.on the polycrystalline etching impurity is compared,from which the best operating conditions are obtained.It is confirmed that the correlation between the residual silicon slag and the cavity pressure and magnetic field is stronger.2.The slant of polycrystalline etching Angle leads to the high threshold voltage Vth;A.The initial sheet Angle deviation of the machine when it is cold standby is conducted to test the influence of the cold standby of the etching machine cavity on polycrystalline Angle.The maximum IDLE time and the number of warm sheets are set to avoid this problem.B.set hardware electrode chamber temperature impact Angle,temperature high Angle straight,including setting than 45°to 30°corresponding polycrystalline etching Angle straight 3 degrees.C.A small amount of SF6 gas added to the etching gas can increase the polycrystalline etching Angle.
Keywords/Search Tags:VDMOS device, polycrystalline etching, threshold voltage Vth, gate source current IGSS
PDF Full Text Request
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